MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 209

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

Figure 5-25 depicts the timing of the BKPT /FREEZE method. In both cases, the serial
clock is left high after the final shift of each transfer. This technique eliminates the
possibility of accidentally tagging the prefetch initiated at the conclusion of a BDM session.
As mentioned previously, all timing within the CPU is derived from the rising edge of the
clock; the falling edge is effectively ignored.
Figure 5-26 represents a sample circuit providing for both BKPT assertion methods. As
the name implies, FORCE_BGND is used to force a transition into BDM by the assertion
of BKPT . FORCE_BGND can be a short pulse or can remain asserted until FREEZE is
asserted. Once asserted, the set-reset latch holds BKPT low until the first SHIFT_CLK is
applied.
BKPT_TAG should be timed to the bus cycles since it is not latched. If extended past the
assertion of FREEZE, the negation of BKPT_TAG appears to the CPU32 as the first
DSCLK.
5-72
FORCE_BGND
FORCE_BGND
BKPT_TAG
BKPT_TAG
SHIFT_CLK
SHIFT_CLK
FREEZE
FREEZE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
BKPT
BKPT
Figure 5-24. BKPT Timing for Single Bus Cycle
FORCE_BGND
SHIFT_CLK
. . . . .
Figure 5-25. BKPT Timing for Forcing BDM
BKPT_TAG
Figure 5-26. BKPT /DSCLK Logic Diagram
RESET
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68340 USER’S MANUAL
Go to: www.freescale.com
S2
R
S1
Q
Q
BKPT/DSCLK
MOTOROLA