MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 282
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MC68340AG16E
Manufacturer Part Number
MC68340AG16E
Description
IC MPU 32BIT 16MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68340FE25E.pdf
(441 pages)
Specifications of MC68340AG16E
Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Details
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6.7.5 Function Code Register (FCR)
The FCR contains the source and destination function codes for the channel. This register
is accessible in either supervisor or user space. The FCR can always be read or written to
when the DMA module is enabled (i.e., the STP bit in the MCR is cleared).
SFC—Source Function Code Field
DFC—Destination Function Code Field
6-32
This field can be used to specify the source access to a certain address space type.
The source function code bits are defined in Table 6-6.
This field can be used to specify the destination access to a certain address space type.
The destination function code bits are defined in Table 6-6.
Although FC3 can be set for DMA transfers to distinguish the
source or destination space from other data or program
spaces, it is not required to be set. Since the CPU32 currently
has only 3-bit SFC and DFC capability, it cannot emulate
FC3 = 1 at this time. However, it is recommended that FC3 be
set to one to distinguish DMA or CPU access during debug.
FCR1, FCR2
U = Unaffected by reset.
RESET:
3
0
0
0
0
0
0
0
0
1
Freescale Semiconductor, Inc.
7
U
Table 6-6. Address Space Encoding
Function Code Bits
For More Information On This Product,
6
U
2
0
0
0
0
1
1
1
1
x
SFC
MC68340 USER’S MANUAL
Go to: www.freescale.com
5
U
1
0
0
1
1
0
0
1
1
x
4
U
NOTE
0
0
1
0
1
0
1
0
1
x
3
U
Supervisor Data Space
User Program Space
Reserved (Motorola)
Reserved (Motorola)
Supervisor Program
Supervisor/User
Address Spaces
User Data Space
Reserved (User)
2
U
CPU Space
DMA Space
DFC
$78B, $7AB
Space
1
U
0
U
MOTOROLA
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