MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 305

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MC68340AG16E

Manufacturer Part Number
MC68340AG16E
Description
IC MPU 32BIT 16MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68340AG16E

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

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7.3.2.1 TRANSMITTER. The transmitters are enabled through their respective command
registers (CR) located within the serial module. The serial module signals the CPU32
when it is ready to accept a character by setting the transmitter-ready bit (TxRDY) in the
channel's status register (SR). Functional timing information for the transmitter is shown in
Figure 7-5.
The transmitter converts parallel data from the CPU32 to a serial bit stream on TxDx. It
automatically sends a start bit followed by the programmed number of data bits, an
optional parity bit, and the programmed number of stop bits. The least significant bit is
sent first. Data is shifted from the transmitter output on the falling edge of the clock
source.
Following transmission of the stop bits, if a new character is not available in the transmitter
holding register, the TxDx output remains high ('mark' condition), and the transmitter
empty bit (TxEMP) in the SR is set. Transmission resumes and the TxEMP bit is cleared
when the CPU32 loads a new character into the transmitter buffer (TB). If a disable
command is sent to the transmitter, it continues operating until the character in the
7-10
TRANSMITTER
NOTES:
1. TIMING SHOWN FOR MR2(4) = 1
2. TIMING SHOWN FOR MR2(5) = 1
3. C = TRANSMIT CHARACTER
4. W = WRITE
ENABLED
TxRDY
RTS 2
N
(SR2)
CTS
TxDx
CS
1
C1
W
MANUALLY ASSERTED
BY BIT- SET COMMAND
Figure 7-5. Transmitter Timing Diagram
Freescale Semiconductor, Inc.
TRANSMISSION
For More Information On This Product,
C1
C2
W
C1 IN
MC68340 USER’S MANUAL
Go to: www.freescale.com
C2
C3
W
START
BREAK
W
C3
C4
W
BREAK
BREAK
STOP
W
TRANSMITTED
C4
NOT
W
C5
MOTOROLA
W
C6
MANUALLY
ASSERTED
C6

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