MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 6

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MC68340AG16E

Manufacturer Part Number
MC68340AG16E
Description
IC MPU 32BIT 16MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68340AG16E

Processor Type
M683xx 32-Bit
Speed
16MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Controller Family/series
68K
Core Size
32 Bit
No. Of I/o's
16
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
UART
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68340AG16E
Manufacturer:
Freescale Semiconductor
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Manufacturer:
FREESCALE
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Part Number:
MC68340AG16E
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Freescale Semiconductor
Quantity:
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Part Number:
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Part Number:
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11/2/95
Paragraph
2.15
2.15.1
2.15.2
2.15.3
2.15.4
2.16
2.17
2.18
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.7
3.1.7.1
3.1.7.2
3.1.7.3
3.2
3.2.1
3.2.2
3.2.3
3.2.3.1
3.2.3.2
3.2.3.3
3.2.3.4
3.2.3.5
3.2.3.6
3.2.3.7
3.2.4
3.2.5
3.2.6
3.3
3.3.1
3.3.2
3.3.3
MOTOROLA
Number
Test Signals....................................................................................................... 2-13
Synthesizer Power (V
System Power and Ground (V
Signal Summary............................................................................................... 2-13
Bus Transfer Signals........................................................................................ 3-1
Data Transfer Mechanism............................................................................... 3-5
Data Transfer Cycles........................................................................................ 3-16
TABLE OF CONTENTS (Continued)
Test Clock (TCK)........................................................................................... 2-13
Test Mode Select (TMS).............................................................................. 2-13
Test Data In (TDI).......................................................................................... 2-13
Test Data Out (TDO)..................................................................................... 2-13
Bus Control Signals ..................................................................................... 3-2
Function Code Signals................................................................................ 3-3
Address Bus (A31–A0) ................................................................................ 3-4
Address Strobe ( AS ).................................................................................... 3-4
Data Bus (D15–D0)...................................................................................... 3-4
Data Strobe ( DS )........................................................................................... 3-4
Bus Cycle Termination Signals.................................................................. 3-4
Dynamic Bus Sizing..................................................................................... 3-5
Misaligned Operands................................................................................... 3-7
Operand Transfer Cases............................................................................. 3-7
Bus Operation................................................................................................ 3-14
Synchronous Operation with DSACK ..................................................... 3-14
Fast Termination Cycles.............................................................................. 3-15
Read Cycle..................................................................................................... 3-16
Write Cycle..................................................................................................... 3-18
Read-Modify-Write Cycle............................................................................. 3-19
Bus Error ( BERR )....................................................................................... 3-5
Autovector ( AVEC ).................................................................................... 3-5
Byte Operand to 8-Bit Port, Odd or Even (A0 = X) .............................. 3-7
Byte Operand to 16-Bit Port, Even (A0 = 0).......................................... 3-8
Byte Operand to 16-Bit Port, Odd (A0 = 1) ........................................... 3-9
Word Operand to 8-Bit Port, Aligned..................................................... 3-9
Word Operand to 16-Bit Port, Aligned................................................... 3-10
Long-word Operand to 8-Bit Port, Aligned........................................... 3-10
Long-Word Operand to 16-Bit Port, Aligned........................................ 3-12
Data Transfer and Size Acknowledge Signals
( DSACK1 and DSACK0 )..................................................................... 3-4
Freescale Semiconductor, Inc.
For More Information On This Product,
SECTION 1: OVERVIEW
MC68340 USER'S MANUAL
Go to: www.freescale.com
CCSYN
Bus Operation
Section 3
).......................................................................... 2-13
Title
CC
and GND)................................................ 2-13
UM Rev 1
Number
P a g e
v

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