MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 292

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

* This code is used to initialize the 68340's internal DMA channel
* registers, providing basic functions for operation.
* The code sets up channel 1 for internal request generation
* to perform a memory block initialization for 100 bytes.
***************************************************************************
***************************************************************************
* SIM40 equates
***************************************************************************
MBAR
MODBASE EQU $FFFFF000 SIM40 MBAR address value
***************************************************************************
* DMA Channel 1 equates
DMACH1
DMAMCR1 EQU $0
* Channel 1 register offsets from channel 1 base address
DMAINT1
DMACCR1
DMACSR1
DMAFCR1
DMASAR1
DMADAR1
DMABTC1
SARADD
DARADD
NUMBYTE
***************************************************************************
***************************************************************************
* Initialize DMA Channel 1
***************************************************************************
* Initialize DMA channel 1 MCR
* Normal Operation, ignore FREEZE, dual-address mode. ISM field at 3. Make
* sure CPU32 SR I2-I0 bits are less than or equal to ISM bits for channel
* startup.Supervisor/user reg. unrestricted, MAID field at 3.
* IARB priority at 4.
* Clear channel control reg.
* Clear STR (start) bit to prevent the channel from starting a transfer early.
* Initialize interrupt reg.
* Interrupt priority at 7, interrupt vector at $42.
6-42
LEA
MOVE.W
CLR.W
EQU $780
EQU $0003FF00 Address of SIM40 Module Base Address Reg.
EQU $8
EQU $B
EQU $C
EQU $14
EQU $6000
EQU $8000
MODBASE+DMACH1,A0 Pointer to channel 1
EQU $4
EQU $A
EQU $10
EQU $64
#$0334,(A0)
DMACCR1(A0)
Freescale Semiconductor, Inc.
For More Information On This Product,
MC68340 USER’S MANUAL
Offset from MBAR for channel 1 regs
function code register channel 1
source address register channel 1
destination address
MCR for channel 1
interrupt register channel 1
control register channel 1
status register channel 1
destination address register channel 1
byte transfer count register channel 1
source address
number of bytes to transfer
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