MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 394

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

An equation for the chip select access time, t CSDV , can be developed as follows:
where:
Using these equations, the memory access times at 16.78 MHz are shown in Table 10-1.
See Section 11 Electrical Characteristics for more timing information.
The values can be used to determine how many clock cycles an access will take, given
the access time of the memory devices and any delays through buffers or external logic
that may be needed.
10.2.3 Calculating Frequency-Adjusted Output
The general relationship between the CLKOUT and most input and output signals is
shown in Figure 10-11. Most outputs transition off of a falling edge of CLKOUT, but the
same principle applies to those outputs that transition off of a rising edge.
For outputs that are referenced to a clock edge, the propagation delay (t d ) does not
change as the frequency changes. For instance, specification 6 in the electrical
characteristics, shown in Section 11 Electrical Characteristics, shows that address,
function code, and size information is valid 3 to 30 ns after the rising edge of S0. This
specification does not change even if the device frequency is less than 16.78 MHz.
MOTOROLA
t cyc = system clock period
N c = number of clocks per access
t s9 = CLKOUT low to CS asserted = 30 ns maximum at 16.78 MHz
t s27 = data-in valid to CLKOUT low setup = 5 ns minimum at 16.78 MHz
ASYNCHRONOUS
Access Time
Table 10-1. Memory Access Times at 16.78 MHz
Figure 10-11. Signal Relationships to CLKOUT
t
t
CSDV
ADV
OUTPUTS
CLKOUT
INPUTS
Freescale Semiconductor, Inc.
For More Information On This Product,
t CSDV = t cyc (N c – 1) – t s9 – t s27
N = 2
54 ns
24 ns
MC68340 USER’S MANUAL
Go to: www.freescale.com
114 ns
N = 3
84 ns
t su
173 ns
143 ns
N = 4
h t
t d
233 ns
203 ns
N = 5
292 ns
263 ns
N = 6
10-7