PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 101

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

To this effect the outputs of the D-channel controllers (e.g. ICC - ISDN Communication
Controller PEB 2070) are wired-or (negative logic, i.e. a “0” wins) and connected to pin
DU. The inputs of the ICCs are connected to pin DD. External pull-up resistors on DU/
DD are required. The arbitration mechanism must be activated by setting MODED.DIM2-
0=00x.
Figure 53
The arbitration mechanism is implemented in the last octet in IOM-2 channel 2 of the
IOM-2 interface
by software (µP access to the C/I channel) or by the ISAC-SX TE itself (transmission of
an HDLC frame in the D-channel). A software access request to the bus is effected by
setting the BAC bit (CIX0 register) to ’1’.
In the case of an access request, the ISAC-SX TE checks the Bus Accessed-bit BAC (bit
5 of last octet of CH2 on DU,
a logical ’1’. If the bus is free, the ISAC-SX TE transmits its individual TIC bus address
TAD programmed in the CIX0 register (CIX0.TBA2-0). The ISAC-SX TE sends its TIC
bus address TAD and compares it bit by bit with the value on DU. If a sent bit set to ’1’
is read back as ’0’ because of the access of another D-channel source with a lower TAD,
the ISAC-SX TE withdraws immediately from the TIC bus, i.e. the remaining TAD bits
are not transmitted. The TIC bus is occupied by the device which sends its address error-
free. If more than one device attempt to seize the bus simultaneously, the one with the
lowest address values wins. This one will set BAC=0 on TIC bus and starts D-channel
transmission in the same frame.
Data Sheet
D-channel
control
ICC (7)
ICC (2)
ICC (1)
.
.
.
Applications of TIC Bus in IOM-2 Bus Configuration
(Figure
TIC-Bus
on IOM-2
54). An access request to the TIC bus may either be generated
transceiver
Figure
S-
54) for the status "bus free“, which is indicated by
101
S-Interface
Description of Functional Blocks
NT
3086_09
U-Interface
PSB 3186
PSF 3186
2000-08-23