PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 181

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

4.4.8
Value after reset: 00
SRES
RES_xx ... Reset Functional Block xx
A reset can be activated on the functional block C/I-handler, Monitor channel, D-channel,
IOM handler, S-transceiver and to pin RSTO.
Setting one of these bits to “1” causes the corresponding block to be reset for a duration
of 4 BCL clock cycles, except RES_RSTO which is activated for a duration of
125 ... 250µs. The bits are automatically reset to “0” again.
4.4.9
Value after reset: 00
TIMR2
TMD ... Timer Mode
Timer 2 can be used in two different modes of operation.
0: Count Down Timer. An interrupt is generated only once after a time period of
1: Periodic Timer. An interrupt is periodically generated every 1 ... 63 ms (see CNT).
CNT ... Timer Counter
0: Timer off.
1 ... 63:Timer period = 1 ... 63 ms
By writing ’0’ to CNT the timer is immediately stopped. A value different from that
determines the time period after which an interrupt will be generated.
If the timer is already started with a certain CNT value and is written again before an
interrupt has been released, the timer will be reset to the new value and restarted again.
An interrupt is indicated to the host in AUXI.TIN2.
Note: Reading back this value delivers back the current counter value which may differ
Data Sheet
1...63 ms.
from the programmed value if the counter is running.
7
7
SRES - Software Reset Register
RES_
TIMR2 - Timer 2 Register
TMD
CI
H
H
0
0
0
RES_
MON
181
RES_
DCH
CNT
RES_
IOM
Detailed Register Description
RES_
TR
0
0
RSTO
RES_
RD/WR (65)
PSB 3186
PSF 3186
2000-08-23
WR (64)