PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 84
PSB3186FV1.4
Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV1.4.pdf
(207 pages)
Specifications of PSB3186FV1.4
Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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Table 10
Enabled Interrupts
(Register MSTI)
STI
xy
-
xy
xy
xy
xy
xy
An STOV interrupt is not generated if all stimulating STI interrupts are acknowledged.
An STIxy must be acknowledged by setting the ACKxy bit in the ASTI register until two
BCL clocks (for DPS=’0’) or one BCL clocks (for DPS=’1’) before the timeslot which is
selected for the appropriate STIxy.
The interrupt structure of the synchronous transfer is shown in
.
Figure 42
Data Sheet
0
0
0
0
0
0
; xy
; xy
; xy
1
1
1
Interrupt
TRAN
MASK
WOV
MOS
ICD
CIC
ST
Examples for Synchronous Transfer Interrupts
Interrupt Structure of the Synchronous Data Transfer
STOV
-
xy
xy
xy
xy
xy
xy
0
1
0
0
1
0
TRAN
ISTA
WOV
MOS
ICD
; xy
; xy
; xy
CIC
ST
1
1
1
; xy
2
Generated Interrupts
(Register STI)
STI
xy
-
xy
xy
xy
xy
xy
xy
xy
xy
STOV20
STOV21
STOV11
STOV10
0
0
0
0
1
0
1
0
1
MSTI
STI20
STI11
STI10
STI21
84
Description of Functional Blocks
STOV
-
-
xy
xy
xy
xy
-
xy
xy
xy
STOV10
STOV20
STOV11
STOV21
1
0
0
1
1
0
1
STI21
STI20
STI11
STI10
STI
; xy
; xy
; xy
1
2
2
Figure
42.
ACK10
ACK11
Example 1
Example 2
Example 3
Example 4
Example 5
Example 6
Example 7
ACK21
ACK20
ASTI
PSB 3186
PSF 3186
2000-08-23
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