PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 63
PSB3186FV1.4
Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV1.4.pdf
(207 pages)
Specifications of PSB3186FV1.4
Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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Figure 31
The following example illustrates the use of a state diagram with an extract of the TE
state diagram. The state explained is “F3 deactivated”.
The state may be entered:
– from the unconditional states (ARL, RES, TM)
– from state “F3 pending deactivation”, “F3 power up”, “F4 pending activation” or “F5
The following informations are transmitted:
– INFO 0 (no signal) is sent on the S/T-interface.
C/I message “DC” is issued on the IOM-2 interface.
The state may be left by either of the following methods:
– Leave for the state “F3 power up” in case C/I = “TIM” code is received.
– Leave for state “F4 pending activation” in case C/I = AR8 or AR10 is received.
– Leave for the state “F6 synchronized” after INFO 2 has been recognized on the S/T-
– Leave for the state “F7 activated” after INFO 4 has been recognized on the S/T-
– Leave for any unconditional state if any unconditional C/I command is received.
As can be seen from the transition criteria, combinations of multiple conditions are
possible as well. A “ ” stands for a logical AND combination. And a “+” indicates a logical
OR combination.
The sections following the state diagram contain detailed information on all states and
signals used.
Data Sheet
unsynchronized” after the C/I command “DI” has been received.
interface.
interface.
State Diagram Notation
S / T Interface
INFO
IOM-2 Interface
C /
IPAC
ISAC-SX TE
OUT
Ind.
i
x
State
Cmd.
IPAC
63
i
IN
r
Description of Functional Blocks
Unconditional
Transition
ITD09657
PSB 3186
PSF 3186
2000-08-23
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