PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 68

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PSB3186FV1.4

Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV1.4

Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details
3.5.1.3
Note: In the activated states (AI8, AI10 or AIL indication) the 2B+D channels are only
Data Sheet
Command
Activation Request with
priority class 8
Activation Request with
priority class 10
Activation Request Loop ARL
Deactivation Indication
Reset
Timing
Test mode SSP
Test mode SCP
transferred transparently to the S/T interface if one of the three “Activation
Request” commands is permanently issued.
C/I Codes (TE)
Abbr. Code Remark
AR8
AR10 1001 Activation requested by the ISAC-SX, D-
DI
RES
TIM
SSP
SCP
1000 Activation requested by the ISAC-SX, D-
1010 Activation requested for the internal or
1111 Deactivation Indication
0001 Reset of the layer-1 statemachine
0000 Layer-2 device requires clocks to be
0010 One AMI-coded pulse transmitted in each
0011 AMI-coded pulses transmitted continuously,
channel priority set to 8 (see note)
channel priority set to 10 (see note)
external Loop A (see note).
For a non transparent internal loop bit
DIS_TX of register TR_CONF2 has to be set
to ’1’ additionally.
activated
frame, resulting in a frequency of the
fundamental mode of 2 kHz
resulting in a frequency of the fundamental
mode of 96 kHz
68
Description of Functional Blocks
PSB 3186
PSF 3186
2000-08-23

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