PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 170

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

4.3.12
Value after reset: 00
SDS_
CONF
For general information on SDS_BCL please refer to
DIOM_INV ... DU/DD on IOM Timeslot Inverted
0: DU/DD are active during SDS HIGH phase and inactive during the LOW phase.
1: DU/DD are active during SDS LOW phase and inactive during the HIGH phase.
This bit has only effect if DIOM_SDS is set to ’1’ otherwise DIOM_INV is don’t care.
DIOM_SDS ... DU/DD on IOM Controlled via SDS
0: The pin SDS and its configuration settings are used for serial data strobe only. The
IOM-2 data lines are not affected.
1: The DU/DD lines are deactivated during the during High/Low phase (selected via
DIOM_INV) of the SDS signal. The SDS timeslot is selected in SDS_CR.
SDS_BCL ... Enable IOM Bit Clock for SDS
0: The serial data strobe is generated in the programmed timeslot.
1: The IOM bit clock is generated in the programmed timeslot.
4.3.13
Value after reset: FF
MCDA
MCDAxy ... Monitoring CDAxy Bits
Bit 7 and Bit 6 of the CDAxy registers are mapped into the MCDA register.
This can be used for monitoring the D-channel bits on DU and DD and the ’Echo bits’ on
the TIC bus with the same register
Data Sheet
7
7
SDS_CONF - Configuration Register for Serial Data Strobe
MCDA - Monitoring CDA Bits
Bit7
MCDA21
0
Bit6
H
H
0
Bit7
MCDA20
0
Bit6
0
170
DIOM_
Bit7
INV
MCDA11
DIOM_
SDS
Bit6
Chapter
Detailed Register Description
Bit7
0
MCDA10
3.7.2.
0
0
SDS_
BCL
Bit6
RD/WR (5A)
PSB 3186
PSF 3186
2000-08-23
RD (5B)