PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 167

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

PSB 3186
PSF 3186
Detailed Register Description
CLKM ... Clock Mode
If the transceiver is disabled (DIS_TR = ’1’) the DCL from the IOM-2 interface is an input.
0: A double bit clock is connected to DCL
1: A single bit clock is connected to DCL
For general information please refer to
Chapter
3.7.
DIS_OD ... Disable Open Drain Drivers
0: DU/DD are open drain drivers
1: DU/DD are push pull drivers
DIS_IOM ... Disable IOM
DIS_IOM should be set to ’1’ if external devices connected to the IOM interface should
be “disconnected“ e.g. for power saving purposes or for not disturbing the internal IOM
connection between layer 1 and layer 2. However, the ISAC-SX TE internal operation
between S-transceiver, B-channel and D-channel controller is independent of the
DIS_IOM bit.
0: The IOM interface is enabled
1: The IOM interface is disabled. The FSC, DCL clock outputs have high impedance;
clock inputs are active; DU, DD data line inputs are switched off and outputs have high
impedance; except in TE/LT-T mode the DU line is input (“0”-level causes activation), so
the DU pin must be terminated (pull up resistor).
Data Sheet
167
2000-08-23