PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 58

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

3.4
Figure 27
a 7.68 MHz clock signal (f
DCL (1536 kHz) and BCL (768 kHz) synchronous to the received S/T frames.
The FSC signal is used to generate the pulse lengths of the different reset sources C/I
Code, EAW pin and Watchdog (see
in
Figure 27
Data Sheet
Table
XTAL
7.68 MHz
9.
shows the clock system of the ISAC-SX TE. The oscillator is used to generate
Clock Generation
Clock System of the ISAC-SX TE
OSC
f
XTAL
XTAL
DPLL
). The DPLL generates the IOM-2 clocks FSC (8 kHz),
Chapter
Reset
Generation
SW Reset
C/I
EAW
Watchdog
58
3.2.4). The IOM-2 clocks are summarized
Description of Functional Blocks
FSC
DCL
BCL
125 µs
125 µs
125 µs
125 µs
t
t
t
t
250 µs
250 µs
250 µs
250 µs
3186_06
PSB 3186
PSF 3186
2000-08-23