PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 175

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

4.4
4.4.1
Value after reset: 00
ISTA
For all interrupts in the ISTA register following logical states are applied:
0: Interrupt is not acitvated
1: Interrupt is acitvated
ICD ... HDLC Interrupt from D-channel
An interrupt originated from the HDLC controller of the D-channel has been recognized.
ST ... Synchronous Transfer
This interrupt is generated to enable the microcontroller to lock on to the IOM timing for
synchronous transfers. The source can be read from the STI register.
CIC ... C/I Channel Change
A change in C/I channel 0 or C/I channel 1 has been recognized. The actual value can
be read from CIR0 or CIR1.
AUX ... Auxiliary Interrupts
Signals an interrupt generated from external awake (pin EAW), watchdog timer overflow,
timer1 or timer2. The source can be read from the auxiliary interrupt register AUXI.
TRAN ... Transceiver Interrupt
An interrupt originated in the transceiver interrupt status register (ISTATR) has been
recognized.
MOS ... MONITOR Status
A change in the MONITOR Status Register (MOSR) has occured.
Note: A read of the ISTA register clears none of the interrupts. They are only cleared by
Data Sheet
reading the corresponding status register.
7
Interrupt and General Configuration
ISTA - Interrupt Status Register
0
H
0
ST
CIC
175
AUX
TRAN MOS
Detailed Register Description
0
ICD
PSB 3186
PSF 3186
2000-08-23
RD (60)