PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 125
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PSB3186FV1.4
Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV1.4.pdf
(207 pages)
Specifications of PSB3186FV1.4
Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
- Current page: 125 of 207
- Download datasheet (3Mb)
3.8.6
The cause of an interrupt related to the HDLC controller is indicated in the ISTA register
by the ICD bit. This bit points to the interrupt source of the D-channel HDLC controller in
the ISTAD register. The individual interrupt sources of the HDLC controllers during
reception and transmission of data are explained in
respectively.
Figure 66
Each interrupt source in the ISTAD register can selectively be masked by setting the
corresponding bit in MASKD to “1”.
Data Sheet
MASK
TRAN
MOS
HDLC Controller Interrupts
AUX
Interrupt
CIC
ICD
ST
Interrupt Status Registers of the HDLC Controllers
TRAN
ISTA
MOS
AUX
CIC
ICD
ST
125
MASKD
RME
RFO
XMR
XDU
RPF
XPR
Chapter 3.8.2.1
Description of Functional Blocks
D-channel
ISTAD
RME
RFO
XMR
XDU
RPF
XPR
3186_16.vsd
or
Chapter 3.8.3.1
PSB 3186
PSF 3186
2000-08-23
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