PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 75
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PSB3186FV1.4
Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet
1.PSB3186FV1.4.pdf
(207 pages)
Specifications of PSB3186FV1.4
Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
Details
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- Download datasheet (3Mb)
PSB 3186
PSF 3186
Description of Functional Blocks
3.7.1
IOM-2 Handler
The IOM-2 handler offers a great flexibility for handling the data transfer between the
different functional units of the ISAC-SX TE and voice/data devices connected to the
IOM-2 interface. Additionally it provides a microcontroller access to all timeslots of the
IOM-2 interface via the four controller data access registers (CDA).
Figure 36
shows the
architecture of the IOM-2 handler. For illustrating the functional description it contains all
configuration and control registers of the IOM-2 handler. A detailed register description
can be found in
Chapter
4.3.
The PCM data of the functional units
• Transceiver (TR) and the
• Controller data access (CDA)
can be configured by programming the timeslot and data port selection registers (TSDP).
With the TSS bits (Timeslot Selection) the PCM data of the functional units can be
assigned to each of the 12 PCM timeslots of the IOM-2 frame. With the DPS bit (Data
Port Selection) the output of each functional unit is assigned to DU or DD respectively.
The input is assigned vice versa. With the data control registers (xxx_CR) the access to
the data of the functional units can be controlled by setting the corresponding control bits
(EN, SWAP).
The IOM-2 handler also provides access to the
• MONITOR channel (MON)
• C/I channels (C/I0,C/I1)
• TIC bus (TIC) and
• HDLC control
The access to these channels is controlled by the registers MON_CR and DCI_CR.
The IOM-2 interface with the Serial Data Strobe SDS is controlled by the control registers
IOM_CR, SDS_CR.
The reset configuration of the ISAC-SX TE IOM-2 handler corresponds to the defined
frame structure and data ports of a master device in IOM-2 terminal mode (see
Figure
35).
Data Sheet
75
2000-08-23
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