PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 51

• Manufacturer Part Number: PSB3186FV1.4
• Description: ISDN Interface ISDN
• Manufacturer: Infineon Technologies

Specifications of PSB3186FV1.4

• Control Type: HDLC
• Data Rate: 192 Kbps
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Package / Case: MQFP-64
• Lead Free Status / Rohs Status: Details

PSB 3186
PSF 3186
Description of Functional Blocks
3.3.5
Receiver Characteristics
The receiver consists of a differential input stage, a peak detector and a set of
comparators. Additional noise immunity is achieved by digital oversampling after the
comparators. A simplified equivalent circuit of the receiver is shown in
Figure
21.
100 kOhm
Figure 21
Equivalent Internal Circuit of the Receiver Stage
The input stage works together with external 10 k
resistors to match the input voltage
to the internal thresholds. The data detection threshold Vref is continuously adapted
between a maximal (Vrefmax) and a minimal (Vrefmin) reference level related to the line
level. The peak detector requires maximum 2 s to reach the peak value while storing
the peak level for at least 250 s (RC > 1 ms).
The additional level detector for power up/down control works with a fixed thresholds
VrefLD. The level detector monitors the line input signals to detect whether an INFO is
present. When closing an analog loop it is therefore possible to indicate an incoming
signal during activated loop.
Data Sheet
51
2000-08-23