PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 94

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PSB3186FV1.4

Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV1.4

Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details
MX/MR Treatment in Error Case
In the master mode the MX/MR bits are under control of the microcontroller through MXC
or MRC, respectively. An abort is indicated by an MAB interrupt or MER interrupt,
respectively.
In the slave mode the MX/MR bits are under control of the device. An abort is always
indicated by setting the MX/MR bit inactive for two or more IOM-2 frames. The controller
must react with EOM.
Figure 48
an example for an abort requested by the transmitter and
for a successful transmission.
Figure 48
Figure 49
Data Sheet
shows an example for an abort requested by the receiver,
IOM -2 Frame No.
MR (DU)
MX (DD)
IOM -2 Frame No.
MX (DU)
MR (DD)
Monitor Channel, Transmission Abort requested by the Receiver
Monitor Channel, Transmission Abort requested by the Transmitter
1
0
1
0
1
0
1
0
1
1
2
2
Abort Request from Transmitter
Abort Request from Receiver
94
3
3
4
4
Description of Functional Blocks
Figure 50
5
5
EOM
EOM
6
6
mon_rec-abort.vsd
mon_tx-abort.vsd
shows an example
Figure 49
7
7
PSB 3186
PSF 3186
2000-08-23
shows

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