PSB3186FV1.4 Infineon Technologies, PSB3186FV1.4 Datasheet - Page 88

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PSB3186FV1.4

Manufacturer Part Number
PSB3186FV1.4
Description
ISDN Interface ISDN
Manufacturer
Infineon Technologies
Datasheet

Specifications of PSB3186FV1.4

Control Type
HDLC
Data Rate
192 Kbps
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Package / Case
MQFP-64
Lead Free Status / Rohs Status
 Details
3.7.2.2
The strobed IOM-2 bit clock is active during the programmed window. Outside the
programmed window a ’0’ is driven. Two examples are shown in
Figure 45
The strobed bit clock can be enabled in SDS_CONF.SDS_BCL.
Data Sheet
FSC
DD,DU
SDS
(Example1)
SDS
(Example2)
Example 1:
Example 2:
For all examples SDS_CONF.SDS_BCL must be set to “1”.
Strobed IOM-2 Bit Clock
Strobed IOM-2 Bit Clock. Register SDS_CONF programmed to 01
Setting of SDS_CR:
TSS
ENS_TSS
ENS_TSS+1
ENS_TSS+3
TSS
ENS_TSS
ENS_TSS+1
ENS_TSS+3
TS0
B1
TS1
B2
MON0
TS2
= '0
= '5
= '0'
= '0'
= '1'
= '1'
= '1'
= '0'
D CI0
H
H
TS3
'
'
M
R
M
X
TS4
IC1
TS5
IC2 MON1
88
TS6
CI1
TS7
Description of Functional Blocks
M
R
M
X
TS8
TS9
Figure
TS10
TS11
45.
3186_03.vsd
TS0
PSB 3186
PSF 3186
2000-08-23
TS1
H

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