UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 112

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

3.10 CAUTIONS
(1) Program fetches cannot be performed from the internal high-speed RAM area (0FD00H to 0FEFFH when the LOCATION
(2) Special function registers (SFRs)
(3) Stack pointer (SP) operation
(4) Stack pointer (SP) initialization
(5) Do not set external wait for the internal ROM area. If external wait is set for the internal ROM area, the CPU is deadlocked.
(6) If the PD78P4026 is selected by the in-circuit emulator as the emulation CPU, the memory size is always the same as that
72
0 instruction is executed; FFD00H to FFEFFH when the LOCATION 0FH instruction is executed).
Addresses onto which SFRs are not assigned should not be accessed in the area 0FF00H to 0FFFFH*. If such an address
is accessed by mistake, the PD784026 may become deadlocked. A deadlock can only be released by reset input.
* When the LOCATION 0 instruction is executed; FFF00H to FFFFFH when the LOCATION 0FH instruction is executed.
With stack addressing, the entire 1 M-byte space can be accessed, but a stack area cannot be reserved in the SFR area
or internal ROM area.
The SP is undefined after RESET input, while non-maskable interrupts can be acknowledged directly after reset release.
Therefore, an unforeseen operation may be performed if a non-maskable interrupt request is generated while the SP is in
the undefined state directly after reset release. To minimize this risk, the following program should be coded without fail
after reset release.
This deadlock status can be cleared only by reset input.
of the PD784026 even if an instruction that writes data other than FFH (EFH) to IMS is executed.
RSTVCT
INITSEG
RSTSTRT :
CSEG
DW
CSEG
LOCATION 0H ; or LOCATION 0FH
MOVG SP, #STKBGN
to
AT
RSTSTRT
BASE
CHAPTER 3 CPU ARCHITECTURE
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