UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 432
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 432 of 759
- Download datasheet (3Mb)
14.4 EXTERNAL CIRCUIT OF A/D CONVERTER
outputs sampling noise during sampling immediately after an A/D conversion channel has been changed.
an error may occur in the conversion result due to the sampling noise. Especially when the scan mode is used, the impedance
of the signal source must be kept low because the channel whose signal is to be converted changes one after another.
increased too much, the sampling noise is accumulated. Therefore, the most effective way is to reduce the resistance
component.
14.5 CAUTIONS
(1) Range of voltages applied to analog input pins
(2) Hardware start A/D conversion
(3) Connecting capacitor to analog input pins
392
The A/D converter is provided with a sample & hold circuit to stabilize its conversion operation. This sample & hold circuit
To absorb this sampling noise, an external capacitor must be connected. If the impedance of the signal source is high,
One way to absorb the sampling noise is to increase the capacitance of the capacitor. However, if the capacitance is
The following must be noted concerning A/D converter analog input pins ANI0 to ANI7 (P70 to P77).
• A voltage outside the range AV
If this restriction is not observed, the PD784026 may be damaged.
Approximately 10 s is required from the time a valid edge is input to the INTP5 pin until the A/D conversion operation
is actually started. This delay must be taken into account in the design stage. See CHAPTER 19 EDGE DETECTION
FUNCTION for details of the edge detection function.
A capacitor should be connected between the analog input pins (ANI0 to ANI7) and AV
voltage input pin (AV
D conversion operation.
REF1
) and AV
SS
SS
to prevent misoperation due to noise.
to AV
CHAPTER 14 A/D CONVERTER
REF1
should not be applied to pins subject to A/D conversion during an A/
SS
and between the reference
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