UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 91

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(1) Carry flag (CY)
(2) Parity/overflow flag (P/V)
The flags are described below.
The carry flag records a carry or borrow resulting from an operation.
This flag also records the shifted-out value when a shift/rotate instruction is executed, and functions as a bit accumulator
when a bit-manipulation instruction is executed.
The status of the CY flag can be tested with a conditional branch instruction.
The P/V flag performs the following two kinds of operation associated with execution of an operation instruction.
The status of the P/V flag can be tested with a conditional branch instruction.
• Parity flag operation
• Overflow flag operation
Set (1) when the number of bits set (1) as the result of execution of a logical operation instruction, shift/rotate instruction,
or a CHKL or CHKLA instruction is even, and reset (0) if odd. When a 16-bit shift instruction is executed, however, only
the low-order 8 bits of the operation result are valid for the parity flag.
Set (1) only when the numeric range expressed as a two’s complement is exceeded as the result of execution of a
arithmetic operation instruction, and reset (0) otherwise. More specifically, the value of this flag is the exclusive OR of
the carry into the MSB and the carry out of the MSB. For example, the two’s complement range in an 8-bit arithmetic
operation is 80H (–128) to 7FH (+127), and the flag is set (1) if the operation result is outside this range, and reset (0)
if within this range.
Symbol
PSWH
PSWL
UF
S
7
7
Figure 3-8 Program Status Word (PSW) Format
RBS2
6
6
Z
CHAPTER 3 CPU ARCHITECTURE
RBS1
RSS
5
5
RBS0
AC
4
4
IE
–
3
3
P/V
2
2
–
1
1
–
0
CY
0
0
–
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