UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 484

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UPD784026

Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
17.4.2 Operation When Transmission Only Is Enabled
transmit operation starts when a write to the shift register (SIO) is performed while the CTXE1 bit is set (1).
(1) When the internal clock is selected as the serial clock
(2) When an external clock is selected as the serial clock
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A transmit operation is performed when the CTXE bit of the clocked serial interface mode register (CSIM) is set (1). The
When the CTXE bit is cleared (0), the SO pin is in the output high impedance state.
When transmission starts, the serial clock is output from the SCK0 pin and data is output in sequence from SIO to the
SO0 pin in synchronization with the fall of the serial clock, and SI0 pin signals are shifted into SIO in synchronization
with the rise of the serial clock.
There is a delay of up to one SCK0 clock cycle between the start of transmission and the first fall of SCK0.
If transmission is disabled during the transmit operation (by clearing (0) the CTXE bit), SCK0 clock output is stopped
and the transmit operation is discontinued on the next rise of SCK0. In this case an interrupt request (INTCSI) is not
generated, and the SO0 pin becomes output high impedance.
When transmission starts, data is output in sequence from SIO to the SO0 pin in synchronization with the fall of the
serial clock input to the SCK0 pin after the start of transmission, and SI0 pin signals are shifted into SIO in
synchronization with the rise of the SCK0 pin input. If transmission has not started, shift operations are not performed
and the SO0 pin output level does not change even if the serial clock is input to the SCK0 pin.
If transmission is disabled during the transmit operation (by clearing (0) the CTXE bit), the transmit operation is
discontinued and subsequent SCK0 input is ignored. In this case an interrupt request (INTCSI) is not generated, and
the SO0 pin becomes output high impedance.
CHAPTER 17 CLOCKED SERIAL INTERFACE

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