UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 482
UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
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17.4.1 Basic Operation Timing
by bit in MSB-first or LSB-first order in synchronization with the serial clock.
the next data transmit or receive operation is started.
442
In the 3-wire serial I/O mode, data transmission/ reception is performed in 8-bit units. Data is transmitted/received bit
MSB first/LSB first switching is specified by the mode 0 bit of the clocked serial interface mode register (CSIM).
Transmit data is output in synchronization with the fall of SCK0, and receive data is sampled on the rise of SCK0.
An interrupt request (INTCSI) is generated on the 8th rise of SCK0.
When the internal clock is used as SCK0, SCK0 output is stopped on the 8th rise of SCK0 and SCK0 remains high until
3-wire serial I/O mode timing is shown in Figure 17-6.
(a) MSB-first
SO0 (Output)
SI0 (Input)
INTCSI
SCK0*
Figure 17-6 3-Wire Serial I/O Mode Timing (1/2)
CHAPTER 17 CLOCKED SERIAL INTERFACE
1
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
DI7
2
Execution of instruction that writes to SIO, etc.
Start of transfer synchronized with fall of SCK0
DI6
3
DI5
4
DI4
5
DI3
6
DI2
7
DI1
8
DI0
Transfer End
Interrupt Generation
* Master CPU: Output
Slave CPU : Input
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