UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 380
UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
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(6) During PPG output, if the PPG cycle is extremely short as compared with the time required to acknowledge an interrupt,
(7) The output level of the TOn (n = 2, 3) when the timer output is disabled (ENTOn = 0: n = 2, 3) is the reverse value
(8) When using timer/counter 2 as an external event counter, the status where no valid edge is input cannot be distinguished
340
the value of the compare register (CR2n: n = 0, 1) cannot be rewritten by interrupt processing that is performed on
match between timer register (TM2) and compare register (CR2n). Use another method (for example, to poll the
interrupt request flags by software with all the interrupts masked).
of the value set to the ALVn (n = 2, 3) bit. Note, therefore, that an active level is output when the timer output is disabled
with the PWM output function or PPG output function selected.
from the status where only one valid edge has been input, by using timer register 2 (TM2) alone (refer to
Figure 10-62), because the contents of TM2 are 0 in both the cases. To make a distinction, use the interrupt request
flag of INTP2, as shown in Figure 10-63 (the INTP2 pin is multiplexed with the CI pin and both the functions can be
used at the same time).
Figure 10-62 Example Where Whether One or No Valid Edge Has been Input Cannot Be Distinguished
with External Event Counter
TM0
CI
Count start
0
Cannot be
distinguished
CHAPTER 10 TIMER/COUNTER 2
0
1
2
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