UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 495
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 495 of 759
- Download datasheet (3Mb)
(2) Serial bus interface control register (SBIC)
Bus Release Trigger Bit (W)
Command Trigger Bit (W)
Bus Release Detection Flag (R)
Command Detection Flag (R)
RELT
CMDT
RELD
CMDD
The SBIC is an 8-bit register composed of bits which control the serial bus status and flags which indicate various
statuses of the input data from the serial bus.
SBIC can be read or written to with an 8-bit manipulation instruction or bit manipulation instruction, but read/write
capability varies from bit to bit. The format of the SBIC is shown in Figure 17-12.
RESET input clears the value of SBIC to 00H.
The bus release signal (REL) trigger output control bit. The SO latch is set (1) by setting this bit, after which the RELT
bit is automatically cleared (0).
The command signal (CMD) tirgger output control bit. The SO latch is cleared (0) by setting this bit, after which the
CMDT bit is automatically cleared (0).
Clearing Conditions (RELD = 0)
<1> When a transfer start instruction is executed
<2> When reset is input
<3> When CTXE = CRXE = 0
Clearing Conditions (CMDD = 0)
<1> When a transfer start instruction is executed
<2> When the bus release signal (REL) is detected
<3> When reset is input
<4> When CTXE = CRXE = 0
SBIC
BSYE
7
ACKD
CHAPTER 17 CLOCKED SERIAL INTERFACE
6
ACKE
Figure 17-12 SBIC Format (1/2)
5
ACKT
4
CMDD
3
RELD
Setting Condition (RELD = 1)
When the bus release signal (REL) is detected
Setting Condition (CMDD = 1)
When the command signal (CMD) is detected
2
CMDT
1
RELT
0
(00H on reset)
455
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