UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 93
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 93 of 759
- Download datasheet (3Mb)
(5) Register set selection flag (RSS)
(6) Zero flag (Z)
(7) Sign flag (S)
(8) Register bank selection flag (RBS0 to RBS2)
(9) User flag (UF)
The RSS flag specifies the general-purpose registers that function as X, A, C and B, and the general-purpose register pairs
(16-bit) that function as AX and BC.
This flag is provided to maintain compatibility with the 78K/III series, and must be set to 0 except when using a 78K/III series
program.
The Z flag records the fact that the result of an operation is “0”.
It is set (1) when the result of an operation is “0”, and reset (0) otherwise. The status of the Z flag can be tested with a
conditional branch instruction.
The S flag records the fact that the MSB is “1” as the result of an operation.
It is set (1) when the MSB is “1” as the result of an operation, and reset (0) otherwise. The status of the S flag can be tested
with a conditional branch instruction.
This is a 3-bit flag used to select one of the 8 register banks (register bank 0 to register bank 7) (see Table 3-3).
It stores 3-bit information which indicates the register bank selected by execution of a SEL RBn instruction, etc.
This flag can be set and reset in the user program, and used for program control.
RBS2
0
0
0
0
1
1
1
1
Table 3-3 Register Bank Selection
RBS1
CHAPTER 3 CPU ARCHITECTURE
0
0
1
1
0
0
1
1
RBS0
0
1
0
1
0
1
0
1
Register bank 0
Register bank 1
Register bank 2
Register bank 3
Register bank 4
Register bank 5
Register bank 6
Register bank 7
Specified Register Bank
53
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