UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 642

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UPD784026

Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
602
REFRQ
(b) External memory accesses
ASTB
WR
RD
When an access is made to an address corresponding to a cleared (0) bit in the refresh area specification register
(RFA), a refresh pulse is always output from the REFRQ pin at the same time as the RD signal or WR signal,
irrespective of the cycle specified by the refresh mode register (RFM).
After refresh pulse output, accesses to internal memory or accesses to addresses corresponding to a set (1) bit
in the RFA continue, and after the time specified by the RFT0 and RFT1 bits of the RFM has elapsed, a refresh
bus cycle is generated so as not to overlap a memory access cycle, and a refresh pulse is output.
In this way, refreshing can be performed while memory that does not need refreshing, such as PROM, is being
accessed, refresh bus cycle insertions can be reduced, and instruction execution can be performed efficiently.
Read Cycle Write Cycle Read Cycle
CHAPTER 21 LOCAL BUS INTERFACE FUNCTION
Figure 21-18 Refresh Pulse Output Operation
Time specified by RFT0 &
RFT1 bits of RFM
Read Cycle
Refresh
Bus Cycle Write Cycle
In case of access to area in which
memory access operations and refresh
operations are performed exclusively
In case of access to area in which
memory access operations and refresh
operations are performed simultaneously
As refresh pulse has not been output
during the time specified by RFT0 & RFT1
bits of RFM, refresh bus cycle is inserted

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