UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 628
UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
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21.2.2 Address Waits
is set (1), waits are inserted in every memory access*. When an address wait is inserted, the high-level period of the ASTB
signal is extended by one system clock cycle (80 ns: f
588
Address waits are used to secure the address decoding time. If the AW bit of the memory extension mode register (MM)
* Except for the internal RAM, internal SFRs, and internal ROM during high-speed fetch.
* f
If it is specified that the internal ROM is accessed in the same cycle as the external ROM, an address wait state is
inserted even when the internal ROM is accessed.
(a) Read timing with no address wait insertion
CLK
: Internal system clock frequency. This signal is present inside the PD784026 only.
AD0 - AD7
A8-A19
ASTB
f
CLK
RD
*
Figure 21-10 Address Wait Function Read/Write Timing (1/3)
Hi-Z
CHAPTER 21 LOCAL BUS INTERFACE FUNCTION
Low-Order
Address
High-Order Address
CLK
Hi-Z
= 12.5 MHz).
Input Data
Hi-Z
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