UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 88

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

3.4.2 Special Function Register (SFR) Area
Figures 3-1 to 3-4).
etc., to be accessed in external memory extension mode (specified by the memory extension mode register (MM)) by the ROM-
less product or internal ROM products.
3.4.3 External SFR Area
executed; 0FFFD0H to 0FFFDFH when the LOCATION 0FH instruction is executed) is mapped as an external SFR area. When
the external memory extension mode is set in a ROM-less product or internal ROM product, externally connected peripheral
I/Os, etc., can be accessed using the address bus or address/data bus, etc.
the object size can be reduced, and macro service can be used.
3.5 EXTERNAL MEMORY SPACE
mode register (MM). It can store programs, table data, etc., and can have peripheral I/O devices allocated to it.
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The internal peripheral hardware special function registers (SFRs) are mapped onto the area from 0FF00H to 0FFFFH (see
The area from 0FFD0H to 0FFDFH is mapped as an external SFR area, and allows externally connected peripheral I/Os,
Caution Addresses onto which SFRs are not mapped should not be accessed in this area. If such an address is
Remark The addresses in this text are those that apply when the LOCATION 0 instruction is executed. When the
In PD784026 subseries products, the 16-byte area from 0FFD0H to 0FFDFH in the SFR area (when the LOCATION 0 is
As the external SFR area can be accessed by SFR addressing, peripheral I/O and similar operations can be performed easily,
Bus operations for accesses to the external SFR area are performed in the same way as for ordinary memory accesses.
The external memory space is a memory space that can be accessed in accordance with the setting of the memory extension
accessed by mistake, the CPU may become deadlocked. A deadlock can only be released by reset input.
LOCATION 0FH instruction is executed, 0F0000H should be added to the values shown in the text.
CHAPTER 3 CPU ARCHITECTURE