UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 541

• Manufacturer Part Number: UPD784026
• Description: 16/8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

20.3.1 Interrupt Control Registers
the corresponding interrupt request. The interrupt control register format is shown in Figure 20-1.
(1) Priority specification flags (
(2) Context switching enable flag (
(3) Macro service enable flag (
An interrupt control register is allocated to each interrupt source, and performs priority control, mask control, etc. for
The priority specification flags specify the priority on an individual interrupt source basis for the 21 maskable interrupts.
Up to 4 priority levels can be specified, and a number of interrupt sources can be specified at the same level. Among
maskable interrupt sources, level 0 is the highest priority.
If multiple interrupt requests are generated simultaneously among interrupt source of the same priority level, they are
acknowledged in default priority order.
These flags can be manipulated bit-wise in software.
RESET input sets all bits to “1”.
The context switching enable flag specifies that a maskable interrupt request is to be processed by context switching.
In context switching, the register bank specified beforehand is selected by hardware, a branch is made to a vector
address stored beforehand in the register bank, and at the same time the current contents of the program counter (PC)
and program status word (PSW) are saved in the register bank.
Context switching is suitable for real-time processing, since execution of interrupt processing can be started faster than
with normal vectored interrupt processing.
This flag can be manipulated bit-wise in software.
RESET input sets all bits to “0”.
The macro service enable flag specifies whether an interrupt request corresponding to that flag is to be handled by
vectored interrupt or context switching, or by macro service.
When macro service processing is selected, at the end of the macro service (when the macro service counter reaches
0) the macro service enable flag is automatically cleared (0) by hardware (vectored interrupt processing/context
switching processing).
This flag can be manipulated bit-wise in software.
RESET input sets all bits to “0”.
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PR1/
CHAPTER 20 INTERRUPT FUNCTIONS
CSE)
PR0)
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