UPD784026 Renesas Electronics Corporation., UPD784026 Datasheet - Page 87
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UPD784026
Manufacturer Part Number
UPD784026
Description
16/8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD784026.pdf
(759 pages)
- Current page: 87 of 759
- Download datasheet (3Mb)
(1) Internal high-speed RAM (IRAM)
(2) Peripheral RAM (PRAM)
Remark The addresses in this text are those that apply when the LOCATION 0 instruction is executed. When the
The internal high-speed RAM (IRAM) allows high-speed accesses to be made. The short direct addressing mode for high-
speed accesses can be used on FD20H to FEFFH in this area. There are two kinds of short direct addressing mode, short
direct addressing 1 and short direct addressing 2, according to the target address. The function is the same in both of these
addressing modes. With some instructions, the word length is shorter with short direct addressing 2 than with short direct
addressing 1. See the 78K/IV Series User’s Manual-Instruction for details.
A program fetch cannot be performed from IRAM. If a program fetch is performed from an address onto which IRAM is
mapped, CPU inadvertent loop will result.
The following areas are reserved in IRAM.
If the reserved function is not used in these areas, they can be used as ordinary data memory.
The peripheral RAM (PRAM) is used as ordinary program memory or data memory. When used as program memory, the
program must be written to the peripheral RAM beforehand by a program.
Program fetches from peripheral RAM are fast, with a 2-byte fetch being executed in 2 clocks.
• General-purpose register area
• Macro service control word area : FE06H to FE2FH (excluding 0FE22H, 0FE23H, 0FE2AH, 0FE2BH)
• Macro service channel area
LOCATION 0FH instruction is executed, 0F0000H should be added to the values shown in the text.
: FE80H to FEFFH
: FE00H to FEFFH (the address is specified by the macro service control word)
CHAPTER 3 CPU ARCHITECTURE
47
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