UPD78F0138 NEC, UPD78F0138 Datasheet - Page 125

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

(6) Oscillation stabilization time select register (OSTS)
This register is used to select the X1 oscillation stabilization wait time when STOP mode is released.
The wait time set by OSTS is valid only after STOP mode is released with the X1 input clock selected as CPU
clock. After STOP mode is released with Ring-OSC selected as CPU clock, the oscillation stabilization time must
be confirmed by OSTC.
OSTS can be set by an 8-bit memory manipulation instruction.
RESET input sets OSTS to 05H.
Address: FFA4H
Symbol
OSTS
Cautions 1. If the STOP mode is entered and then released while the Ring-OSC is being used
Remarks 1. Values in parentheses are reference values for operation with f
Figure 5-7. Format of Oscillation Stabilization Time Select Register (OSTS)
OSTS2
7
0
0
0
0
1
1
After reset: 05H
2. f
Other than above
2. The wait time when STOP mode is released does not include the time after STOP
XP
as the CPU clock, set the oscillation stabilization time as follows.
The X1 oscillation stabilization time counter counts up to the oscillation
stabilization time set by OSTS. Note, therefore, that only the status up to the
oscillation stabilization time set by OSTS is set to OSTC after STOP mode is
released.
mode release until clock oscillation starts (“a” below) regardless of whether
STOP mode is released by RESET input or interrupt generation.
OSTS1
: X1 input clock oscillation frequency
6
0
0
1
1
0
0
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time
X1 pin voltage
waveform
set by OSTS
R/W
CHAPTER 5 CLOCK GENERATOR
OSTS0
User’s Manual U16228EJ2V0UD
5
0
1
0
1
0
1
STOP mode release
2
2
2
2
2
Setting prohibited
11
13
14
15
16
/f
/f
/f
/f
/f
XP
XP
XP
XP
XP
4
0
(204.8
(819.2
(1.64 ms)
(3.27 ms)
(6.55 ms)
a
µ
µ
Oscillation stabilization time selection
s)
s)
3
0
OSTS2
2
OSTS1
XP
1
= 10 MHz.
OSTS0
0
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