UPD78F0138 NEC, UPD78F0138 Datasheet - Page 384

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

19.2 Standby Function Operation
19.2.1 HALT mode
(1) HALT mode
Notes 1.
384
Item
System clock
CPU
Port (latch)
16-bit timer/event counter 00
16-bit timer/event counter 01
8-bit timer/event counter 50
8-bit timer/event counter 51
8-bit timer H0
8-bit timer H1
Watch timer
Watchdog
timer
A/D converter
Serial
interface
Clock monitor
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
The HALT mode is set by executing the HALT instruction. HALT mode can be set regardless of whether the CPU
clock before the setting was the X1 input clock, Ring-OSC clock, or subsystem clock.
The operating statuses in the HALT mode are shown below.
2.
3.
4.
5.
6.
HALT Mode Setting
Ring-OSC cannot
be stopped
Ring-OSC can be
stopped
UART0
UART6
CSI10
CSI11
When “Stopped by software” is selected for Ring-OSC by a mask option and Ring-OSC is stopped by
software (for mask options, see CHAPTER 25 MASK OPTIONS).
µ
Operable when the X1 input clock is selected.
Operation not guaranteed when other than subsystem clock is selected.
“Ring-OSC cannot be stopped” or “Ring-OSC can be stopped by software” can be selected by a mask
option.
When “POC used” is selected by a mask option.
PD780133, 780134, 78F0134, 780136, 780138, and 78F0138 only.
Note 2
Note 5
Note 6
Note 5
Note 2
Clock supply to the CPU is stopped.
Operation stopped
Status before HALT mode was set is retained
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operation stopped
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Operable
Clock Used
Subsystem
Oscillation Continues
When HALT Instruction Is Executed While CPU Is
When
Table 19-2. Operating Statuses in HALT Mode (1/2)
When Ring-OSC
Operating on X1 Input Clock
Operable
Subsystem
Clock Not
CHAPTER 19 STANDBY FUNCTION
When
Used
User’s Manual U16228EJ2V0UD
Note 3
Operable
Operation stopped
Clock Used
Subsystem
Oscillation Stopped
When
When Ring-OSC
−
Operable
Subsystem
Clock Not
When
Used
Note 1
Note 3
Operation not guaranteed
Operation not guaranteed
Operation not guaranteed when count clock other than
TI50 is selected
Operation not guaranteed when count clock other than
TI51 is selected
Operation not guaranteed when count clock other than
TM50 output is selected during 8-bit timer/event counter
50 operation
Operation not guaranteed when count clock other than
f
Operable
Operable
Operation not guaranteed
Operation not guaranteed when serial clock other than
TM50 output is selected during TM50 operation
Operation not guaranteed when serial clock other than
external SCK10 is selected
Operation not guaranteed when serial clock other than
external SCK11 is selected
Operable
Operation not guaranteed
Clock Used
Subsystem
R
/2
When HALT Instruction Is Executed While CPU Is
When X1 Input Clock
Oscillation Continues
When
7
is selected
Note 4
Operating on Ring-OSC Clock
Operation not
guaranteed
Subsystem
Clock Not
When
Used
Operable
Operation stopped
Clock Used
Subsystem
When X1 Input Clock
When
Oscillation Stopped
Note 4
Operation not
guaranteed
Subsystem
Clock Not
When
Used