UPD78F0138 NEC, UPD78F0138 Datasheet - Page 34

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

1.7 Outline of Functions
Note The internal flash memory capacity, internal high-speed RAM capacity, and internal expansion RAM capacity
34
Internal
memory
(bytes)
Memory space
X1 input clock (oscillation
frequency)
Ring-OSC clock
(oscillation frequency)
Subsystem clock
(oscillation frequency)
General-purpose registers
Minimum instruction execution
time
Instruction set
I/O ports
Timers
Clock output
Buzzer output
A/D converter
can be changed using the internal memory size switching register (IMS) and the internal expansion RAM size
switching register (IXS).
Mask ROM
Flash memory
High-speed RAM
Expansion RAM
Standard products,
(A) grade products
(A1) grade products
(A2) grade products
Timer outputs
Item
µ
8 K
512
64 KB
Ceramic/crystal/external clock oscillation
On-chip Ring oscillation (240 kHz (TYP.))
Crystal/external clock oscillation (32.768 kHz)
8 bits × 32 registers (8 bits × 8 registers × 4 banks)
0.2
8.3
operation)
122
• 16-bit operation
• Multiply/divide (8 bits × 8 bits, 16 bits ÷ 8 bits)
• Bit manipulate (set, reset, test, and Boolean operation)
Total:
CMOS I/O
CMOS input
CMOS output
N-ch open-drain I/O
• 16-bit timer/event counter: 2 channels (1 channel only in the
• 8-bit timer/event counter:
• 8-bit timer:
• Watch timer
• Watchdog timer:
5 (PWM output: 3)
• 78.125 kHz, 156.25 kHz, 312.5 kHz, 625 kHz, 1.25 MHz, 2.5 MHz, 5 MHz, 10 MHz
• 32.768 kHz (subsystem clock: 32.768 kHz)
1.22 kHz, 2.44 kHz, 4.88 kHz, 9.77 kHz (X1 input clock: 10 MHz)
10-bit resolution × 8 channels
REGC pin is connected directly to V
1
REGC pin is connected directly to V
REGC pin is connected directly to V
PD780131
(X1 input clock: 10 MHz)
µ
F capacitor is connected to REGC pin: 8.38 MHz (V
µ
µ
µ
s/0.4
s/16.6
s (subsystem clock: when operating at f
µ
µ
s/0.8
µ
16 K
PD780132
s/33.2
User’s Manual U16228EJ2V0UD
CHAPTER 1 OUTLINE
µ
s/1.6
µ
s/66.4
−
µ
24 K
1 K
6 (PWM output: 3)
µ
PD780133
s/3.2
µ
−
s/132.8
2 channels
2 channels
1 channel
1 channel
µ
51
38
s (X1 input clock: @ f
8
1
4
µ
32 K
DD
DD
DD
PD780134
µ
:
:
:
s (TYP.) (Ring-OSC clock: @ f
10 MHz (V
to 5.5 V), 5 MHz (V
10 MHz (V
to 5.5 V), 5 MHz (V
8.38 MHz (V
to 5.5 V)
XT
µ
= 32.768 kHz)
32 K
1 K
PD78F0134
Note
−
Note
XP
DD
DD
= 10 MHz operation)
DD
DD
= 4.0 to 5.5 V), 8.38 MHz (V
= 4.0 to 5.5 V), 8.38 MHz (V
• BCD adjust, etc.
= 4.0 to 5.5 V)
= 4.0 to 5.5 V), 5 MHz (V
µ
48 K
1 K
1 K
PD780136
µ
DD
DD
PD780131, 780132)
= 2.7 to 5.5 V)
= 3.3 to 5.5 V)
R
−
= 240 kHz (TYP.)
µ
60 K
PD780138
µ
60 K
1 K
1 K
PD78F0138
DD
DD
DD
= 3.3
Note
Note
−
= 3.3
= 4.0
Note
(1/2)