UPD78F0138 NEC, UPD78F0138 Datasheet - Page 191

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UPD78F0138

Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet

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7.3 Registers Controlling 8-Bit Timer/Event Counters 50 and 51
(1) Timer clock selection register 5n (TCL5n)
The following four registers are used to control 8-bit timer/event counters 50 and 51.
• Timer clock selection register 5n (TCL5n)
• 8-bit timer mode control register 5n (TMC5n)
• Port mode register 1 (PM1) or port mode register 3 (PM3)
• Port register 1 (P1) or port register 3 (P3)
Cautions 1. When the Ring-OSC clock is selected as the clock to be supplied to the CPU, the clock of the
Remarks 1. f
This register sets the count clock of 8-bit timer/event counter 5n and the valid edge of TI5n input.
TCL5n can be set by an 8-bit memory manipulation instruction.
RESET input clears TCL5n to 00H.
Remark n = 0, 1
Address: FF6AH
Symbol
TCL50
2. Figures in parentheses apply to operation at f
2. When rewriting TCL50 to other data, stop the timer operation beforehand.
3. Be sure to set bits 3 to 7 to 0.
X
Ring-OSC oscillator is divided and supplied as the count clock. If the count clock is the
Ring-OSC clock, the operation of 8-bit timer/event counter 50 is not guaranteed.
: X1 input clock oscillation frequency
TCL502
7
0
0
0
0
0
1
1
1
1
After reset: 00H
Figure 7-5. Format of Timer Clock Selection Register 50 (TCL50)
CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
TCL501
6
0
0
0
1
1
0
0
1
1
R/W
TCL500
User’s Manual U16228EJ2V0UD
5
0
0
1
0
1
0
1
0
1
TI50 falling edge
TI50 rising edge
f
f
f
f
f
f
X
X
X
X
X
X
/2 (5 MHz)
/2
/2
/2
/2
(10 MHz)
2
6
8
13
(2.5 MHz)
(156.25 kHz)
(39.06 kHz)
4
0
(1.22 kHz)
X
= 10 MHz.
3
0
Count clock selection
TCL502
2
TCL501
1
TCL500
0
191

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