UPD78F0138 NEC, UPD78F0138 Datasheet - Page 410

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

22.4 Cautions for Power-on-Clear Circuit
voltage (V
release of reset to the start of the operation of the microcontroller can be arbitrarily set by taking the following action.
<Action>
software counter that uses a timer, and then initialize the ports.
• If supply voltage fluctuation is 50 ms or less in vicinity of POC detection voltage
410
Note 1
In a system where the supply voltage (V
After releasing the reset signal, wait for the supply voltage fluctuation period of each system by means of a
Notes 1.
POC
2.
), the system may be repeatedly reset and released from the reset status. In this case, the time from
No
If reset is generated again during this period, initialization processing is not started.
A flowchart is shown on the next page.
Figure 22-3. Example of Software Processing After Release of Reset (1/2)
50 ms has passed?
Check stabilization
Change CPU clock
Checking cause
(TMIFH1 = 1?)
(set to 50 ms)
of oscillation
of reset
Initialization
processing
Start timer
Reset
Power-on-clear
Yes
Note 2
CHAPTER 22 POWER-ON-CLEAR CIRCUIT
DD
User’s Manual U16228EJ2V0UD
) fluctuates for a certain period in the vicinity of the POC detection
; The
;
;
;
;
;
;
The cause of reset (power-on-clear, WDT, LVI, or clock monitor)
can be identified by the RESF register.
8-bit timer H1 can operate with the Ring-OSC clock.
Source: f
(f
Check the stabilization of oscillation of the X1 input clock by using the
OSTC register.
Change the CPU clock from the Ring-OSC clock to the X1 input clock.
TMIFH1 = 1: Interrupt request is generated.
Initialization of ports
R
: Ring-OSC clock oscillation frequency)
Ring-OSC clock is set as the CPU clock when the reset signal is generated
R
(480 kHz (MAX.))/2
7
compare value 200 = 53 ms