UPD78F0138 NEC, UPD78F0138 Datasheet - Page 143
UPD78F0138
Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet
1.UPD78F0138.pdf
(558 pages)
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5.8.5 Register settings
Notes 1.
X1 input clock
Ring-OSC clock
Subsystem clock
The table below shows the statuses of the setting flags and status flags when each mode is set.
2.
3.
4.
5.
6.
f
CPU
Valid only when “clock can be stopped by software” is selected for Ring-OSC by a mask option.
Do not set MCC = 1 or MSTOP = 1 during X1 input clock operation (even if MCC = 1 or MSTOP = 1 is set,
the X1 oscillation does not stop).
Do not set MCC = 1 during Ring-OSC operation (even if MCC = 1 is set, the X1 oscillation does not stop).
To stop X1 oscillation during Ring-OSC operation, use MSTOP.
Shifting to subsystem clock operation mode must be performed from the X1 input clock operation mode.
From subsystem clock operation mode, only X1 input clock operation mode can be shifted to.
Do not set MCM0 = 0 (shifting to Ring-OSC) during subsystem clock operation.
Do not set MSTOP = 1 during subsystem clock operation (even if MSTOP = 1 is set, X1 oscillation does
not stop). To stop X1 oscillation during subsystem clock operation, use MCC.
Note 2
Note 4
Ring-OSC oscillating
Ring-OSC stopped
X1 oscillating
X1 stopped
X1 oscillating, Ring-OSC oscillating
X1 stopped, Ring-OSC oscillating
X1 oscillating, Ring-OSC stopped
X1 stopped, Ring-OSC stopped
Mode
Table 5-7. Clock and Register Setting
CHAPTER 5 CLOCK GENERATOR
User’s Manual U16228EJ2V0UD
MCC
0
PCC Register
Note 3
0
0
0
0
1
0
1
CSS
0
0
1
1
1
0
0
1
Setting Flag
Register
MCM0
MCM
1
1
1
1
Note 5
Note 5
Note 5
Note 5
1
1
0
0
Register
MSTOP RSTOP
MOC
0
0
0
0
Note 6
Note 6
Note 6
Note 6
0
0
0
1
Register
RCM
0
1
0
0
0
0
1
1
Note 1
Register
PCC
CLS
Status Flag
0
0
0
0
1
1
1
1
Register
MCM
MCS
1
1
0
0
1
1
1
1
143
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