UPD78F0138 NEC, UPD78F0138 Datasheet - Page 404

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

operation. Even if CLME is set to 1 by software during the oscillation stabilization time (reset value of OSTS register
is 05H (2
clock ends. Monitoring is automatically started at the end of the oscillation stabilization time.
404
Internal reset signal
RESET input clears bit 0 (CLME) of the clock monitor mode register (CLM) to 0 and stops the clock monitor
Clock monitor status
Ring-OSC clock
X1 input clock
Ring-OSC clock
CPU operation
X1 input clock
16
/f
(CLME = 1 is set after RESET input and during X1 input clock oscillation stabilization time)
XP
CLMRF
)) of the X1 input clock, monitoring is not performed until the oscillation stabilization time of the X1 input
CLME
RESET
CLME
(1) When internal reset is executed by oscillation stop of X1 input clock
Monitoring
operation
Normal
(2) Clock monitor status after RESET input
Figure 21-3. Timing of Clock Monitor (1/4)
Oscillation
Oscillation
stopped
stopped
Reset
CHAPTER 21 CLOCK MONITOR
User’s Manual U16228EJ2V0UD
Clock supply
17 clocks
Monitoring stopped
4 clocks of Ring-OSC clock
stopped
Oscillation stabilization time
Set to 1 by software
Normal operation (Ring-OSC clock)
stabilization time
Waiting for end
of oscillation
Monitoring