UPD78F0138 NEC, UPD78F0138 Datasheet - Page 556

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

D.1 Major Revisions in This Edition
556
Throughout
p. 27
p. 29
p. 41
p. 36
pp. 43, 44
pp. 45, 46
p. 70
p. 71
p. 84
pp. 87 to 89
p. 90
p. 92
p. 102
p. 110
p. 112
p. 116
p. 118
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p. 124
pp. 126 to 128
Page
Addition of products
µ
780138(A2)
Under development → Under mass production
µ
780131(A), 780132(A), 780133(A), 780134(A), 780136(A), 780138(A), 78F0134(A),
78F0138(A), 780131(A1), 780132(A1), 780133(A1), 780134(A1), 780136(A1), 780138(A1)
Modification of names of the following special function registers (SFRs)
• Ports 0 to 7, and 12 to 14 → Port registers 0 to 7, and 12 to 14
Addition of Cautions 3 and 4 to 1.4 Pin Configuration (Top View)
Modification of 1.5 K1 Family Lineup
Modification of outline of timer in and addition of Remark to 1.7 Outline of Functions
Addition of Table 2-1 Pin I/O Buffer Power Supplies
Modification of descriptions in 2.2.12 AV
Modification of the following contents in Table 2-2 Pin I/O Circuit Types
• Modification of recommended connection when P60 to P63 are not used
• Modification of I/O circuit type of P62 and P63
• Addition of Note to AV
• Modification of recommended connection when V
Modification of Figure 3-20 Data to Be Saved to Stack Memory
Modification of Figure 3-21 Data to Be Restored from Stack Memory
Modification of [Description example] in 3.4.4 Short direct addressing
Addition of [Illustration] to 3.4.7 Based addressing, 3.4.8 Based indexed addressing, and 3.4.9 Stack
addressing
Addition of Table 4-1 Pin I/O Buffer Power Supplies
Modification of Table 4-3 Port Configuration
Modification of Figure 4-11 Block Diagram of P20 to P27
Addition of Remark to Figure 4-19 Block Diagram of P130
Deletion of input switch control register (ISC) from and addition of port registers (P0 to P7, P12 to P14) to 4.3
Registers Controlling Port Function
Partial modification of descriptions in 4.4.1 (1) Output mode, 4.4.3 (1) Output mode, and (2) Input mode
Modification of Figure 5-1 Block Diagram of Clock Generator
Addition of Note to 5.3 (1) Processor clock control register (PCC)
Addition of Cautions 2 and 3 to Figure 5-6 Format of Oscillation Stabilization Time Counter Status
Register (OSTC)
Modification of Figure 5-8 Examples of External Circuit of X1 Oscillator, Figure 5-9 Examples of
External Circuit of Subsystem Clock Oscillator, and Figure 5-10 Examples of Incorrect Resonator
Connection
PD78F0134(A1), 78F0138(A1), 780131(A2), 780132(A2), 780133(A2), 780134(A2), 780136(A2),
PD780131, 780132, 780133, 780134, 780136, 780138, 78F0134, 78F0138,
APPENDIX D REVISION HISTORY
REF
User’s Manual U16228EJ2V0UD
REF
, 2.2.15 REGC, and 2.2.20 V
Description
PP
is not used
PP
(flash memory versions only)
(1/3)