UPD78F0138 NEC, UPD78F0138 Datasheet - Page 380

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UPD78F0138

Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet

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19.1 Standby Function and Configuration
19.1.1 Standby function
Notes 1.
Caution The RSTOP setting is valid only when “Can be stopped by software” is set for Ring-OSC by a mask
Remark MSTOP: Bit 7 of the main OSC control register (MOC)
available.
(1) HALT mode
380
Reset
STOP
HALT
Operation
Mode
The standby function is designed to reduce the operating current of the system. The following two modes are
HALT instruction execution sets the HALT mode. In the HALT mode, the CPU operation clock is stopped. If the
X1 oscillator, Ring-OSC oscillator, or subsystem clock oscillator is operating before the HALT mode is set,
oscillation of each clock continues. In this mode, the operating current is not decreased as much as in the STOP
mode, but the HALT mode is effective for restarting operation immediately upon interrupt request generation and
carrying out intermittent operations.
2.
3.
4.
Status
option.
MCC:
RSTOP: Bit 0 of the Ring-OSC mode register (RCM)
MCM0:
When “Cannot be stopped” is selected for Ring-OSC by a mask option.
When “Can be stopped by software” is selected for Ring-OSC by a mask option.
Operates using the CPU clock at STOP instruction execution.
Operates using the CPU clock at HALT instruction execution.
MSTOP = 0
Stopped
Oscillating
MCC = 0
Table 19-1. Relationship Between Operation Clocks in Each Operation Status
Bit 7 of the processor clock control register (PCC)
Bit 0 of the main clock mode register (MCM)
X1 Oscillator
MSTOP = 1
Stopped
MCC = 1
CHAPTER 19 STANDBY FUNCTION
Stopped
Oscillating
Note 1
User’s Manual U16228EJ2V0UD
Ring-OSC Oscillator
RSTOP = 0 RSTOP = 1
Oscillating
Note 2
Stopped
Subsystem
Oscillating
Oscillator
Clock
CPU Clock
Ring-OSC
Note 3
Note 4
Release
After
Stopped
Stopped
Ring-OSC
Supplied to Peripherals
MCM0 = 0
Prescaler Clock
X1
MCM0 = 1

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