UPD78F0138 NEC, UPD78F0138 Datasheet - Page 407

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

clock is stopped, monitoring automatically starts after the Ring-OSC clock is stopped. Monitoring is stopped when
oscillation of the Ring-OSC clock is stopped.
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to 1 before or while oscillation of the Ring-OSC
Note If it is specified by a mask option that Ring-OSC cannot be stopped, the setting of bit 0 (RSTOP) of the
Clock monitor status
Ring-OSC clock
CPU operation
X1 input clock
Ring-OSC mode register (RCM) is invalid. To set RSTOP, be sure to confirm that bit 1 (MCS) of the main
clock mode register (MCM) is 1.
RSTOP
(7) Clock monitor status after Ring-OSC clock oscillation is stopped by software
CLME
Note
Monitoring
Figure 21-3. Timing of Clock Monitor (4/4)
CHAPTER 21 CLOCK MONITOR
Normal operation (X1 input clock or subsystem clock)
User’s Manual U16228EJ2V0UD
Oscillation stopped
Monitoring
stopped
Monitoring
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