UPD78F0138 NEC, UPD78F0138 Datasheet - Page 151

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

Address FFBAH
Symbol
TMC00
TMC003 TMC002 TMC001
OVF00
Cautions 1. Timer operation must be stopped before writing to bits other than the OVF00 flag.
Remark TO00:
0
0
0
0
1
1
1
1
0
1
7
0
Overflow not detected
Overflow detected
0
0
1
1
0
0
1
1
TI000:
TM00:
CR000: 16-bit timer capture/compare register 000
CR010: 16-bit timer capture/compare register 010
2. Set the valid edge of the TI000/P00 pin using prescaler mode register 00 (PRM00).
3. If any the following modes: the mode in which clear & start occurs on match between TM00
6
0
and CR000, the mode in which clear & start occurs at the TI00 valid edge, or free-running
mode is selected, when the set value of CR000 is FFFFH and the TM00 value changes from
FFFFH to 0000H, the OVF00 flag is set to 1.
After reset: 00H
Figure 6-6. Format of 16-Bit Timer Mode Control Register 00 (TMC00)
0
1
0
1
0
1
0
1
16-bit timer/event counter 00 output pin
16-bit timer/event counter 00 input pin
16-bit timer counter 00
5
0
Operation stop
(TM00 cleared to 0)
Free-running mode
Clear & start occurs on TI000
valid edge
Clear & start occurs on match
between TM00 and CR000
4
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
Operating mode and clear
TMC003
R/W
mode selection
3
TMC002
16-bit timer counter 00 (TM00) overflow detection
2
User’s Manual U16228EJ2V0UD
TMC001
1
OVF00
<0>
No change
Match between TM00 and
CR000 or match between
TM00 and CR010
Match between TM00 and
CR000, match between TM00
and CR010 or TI000 valid edge
Match between TM00 and
CR000 or match between
TM00 and CR010
Match between TM00 and
CR000, match between TM00
and CR010 or TI000 valid edge
TO00 inversion timing selection
−
Not generated
Generated on match between
TM00 and CR000, or match
between TM00 and CR010
Interrupt request generation
151