UPD78F0138 NEC, UPD78F0138 Datasheet - Page 237
UPD78F0138
Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet
1.UPD78F0138.pdf
(558 pages)
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10.1 Functions of Watchdog Timer
signal is generated.
For details of RESF, refer to CHAPTER 20 RESET FUNCTION.
Ring-OSC as shown in Table 10-2.
The watchdog timer is used to detect an inadvertent program loop. If a program loop is detected, an internal reset
When a reset occurs due to the watchdog timer, bit 4 (WDTRF) of the reset control flag register (RESF) is set to 1.
The operation mode of the watchdog timer (WDT) is switched according to the mask option setting of the on-chip
Remarks 1. f
f
f
f
f
f
f
f
f
R
R
R
R
R
R
R
R
/2
/2
/2
/2
/2
/2
/2
/2
11
12
13
14
15
16
17
18
During Ring-OSC Clock Operation
(8.53 ms)
(17.07 ms)
(34.13 ms)
(68.27 ms)
(136.53 ms)
(273.07 ms)
(546.13 ms)
(1.09 s)
2. f
3. Figures in parentheses apply to operation at f
Table 10-1. Loop Detection Time of Watchdog Timer
R
XP
: Ring-OSC clock oscillation frequency
: X1 input clock oscillation frequency
CHAPTER 10 WATCHDOG TIMER
User’s Manual U16228EJ2V0UD
Loop Detection Time
f
f
f
f
f
f
f
f
XP
XP
XP
XP
XP
XP
XP
XP
/2
/2
/2
/2
/2
/2
/2
/2
13
14
15
16
17
18
19
20
During X1 Input Clock Operation
(819.2
(1.64 ms)
(3.28 ms)
(6.55 ms)
(13.11 ms)
(26.21 ms)
(52.43 ms)
(104.86 ms)
µ
s)
R
= 240 kHz (TYP.), f
XP
= 10 MHz
237
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