UPD78F0138 NEC, UPD78F0138 Datasheet - Page 389

• Manufacturer Part Number: UPD78F0138
• Description: (UPD78xxxx) 8-Bit Single-Chip Microcontrollers
• Manufacturer: NEC

19.2.2 STOP mode
(1) STOP mode setting and operating statuses
Notes 1.
Item
System clock
CPU
Port (latch)
16-bit timer/event counter 00
16-bit timer/event counter 01
8-bit timer/event counter 50
8-bit timer/event counter 51
8-bit timer H0
8-bit timer H1
Watch timer
Watchdog
timer
A/D converter
Serial interface
Clock monitor
Multiplier/divider
Power-on-clear function
Low-voltage detection function
External interrupt
The STOP mode is set by executing the STOP instruction, and it can be set when the CPU clock before the
setting was the X1 input clock or Ring-OSC clock.
Caution Because the interrupt request signal is used to clear the standby mode, if there is an interrupt
The operating statuses in the STOP mode are shown below.
2.
3.
4.
5.
6.
STOP Mode Setting
Ring-OSC cannot
be stopped
Ring-OSC can be
stopped
When “Stopped by software” is selected for Ring-OSC by a mask option and Ring-OSC is stopped by
software (for mask options, see CHAPTER 25 MASK OPTIONS).
µ
Operable only when f
Operable when the subsystem clock is selected.
“Ring-OSC cannot be stopped” or “Ring-OSC can be stopped by software” can be selected by a mask
option.
When “POC used” is selected by a mask option.
PD780133, 780134, 78F0134, 780136, 780138, and 78F0138 only.
source with the interrupt request flag set and the interrupt mask flag reset, the standby mode is
immediately cleared if set. Thus, the STOP mode is reset to the HALT mode immediately after
execution of the STOP instruction and the system returns to the operating mode as soon as the
wait time set using the oscillation stabilization time select register (OSTS) has elapsed.
UART0
UART6
CSI10
CSI11
Note 5
Note 6
Note 5
Note 2
Note 2
When Subsystem
Only X1 oscillator oscillation is stopped. Clock supply to the CPU is stopped.
Operation stopped
Status before STOP mode was set is retained
Operation stopped
Operation stopped
Operable only when TI50 is selected as the count clock
Operable only when TI51 is selected as the count clock
Operable only when TM50 output is selected as the count clock during 8-bit timer/event counter 50 operation
Operable
Operable
Operable
Operation stopped
Operation stopped
Operable only when TM50 output is selected as the serial clock during TM50 operation
Operable only when external SCK10 is selected as the serial clock
Operable only when external SCK11 is selected as the serial clock
Operation stopped
Operation stopped
Operable
Operable
Operable
When STOP Instruction Is Executed While CPU Is Operating on X1 Input Clock
Clock Used
When Ring-OSC Oscillation
R
Table 19-4. Operating Statuses in STOP Mode
/2
Note 3
Note 4
7
is selected as the count clock.
Continues
CHAPTER 19 STANDBY FUNCTION
When Subsystem
Operation stopped Operable
Clock Not Used
User’s Manual U16228EJ2V0UD
When Subsystem
Operation stopped
Clock Used
When Ring-OSC Oscillation
Note 4
Stopped
−
When Subsystem
Operation stopped Operable
Clock Not Used
Note 1
When Subsystem
When STOP Instruction Is Executed
Operable
Operable
While CPU Is Operating on Ring-
Clock Used
Note 3
Note 4
OSC Clock
When Subsystem
Operation stopped
Clock Not Used
389