UPD78F0138 NEC, UPD78F0138 Datasheet - Page 158

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UPD78F0138

Manufacturer Part Number
UPD78F0138
Description
(UPD78xxxx) 8-Bit Single-Chip Microcontrollers
Manufacturer
NEC
Datasheet

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158
Cautions 1. When the Ring-OSC clock is selected as the clock to be supplied to the CPU, the clock of the
Remarks 1. f
Note The external clock requires a pulse two cycles longer than internal count clock (f
Address: FFB7H
Symbol
PRM01
2. TI000, TI010: 16-bit timer/event counter 00 input pin
3. Figures in parentheses are for operation with f
2. Always set data to PRM00 after stopping the timer operation.
3. If the valid edge of TI000 is to be set for the count clock, do not set the clear & start mode
4. If the TI000 or TI010 pin is high level immediately after system reset, the rising edge is
5. When P01 is used as the TI010 valid edge, it cannot be used as the timer output (TO00), and
X
Ring-OSC oscillator is divided and supplied as the count clock. If the count clock is the
Ring-OSC clock, the operation of 16-bit timer/event counter 00 is not guaranteed. When an
external clock is used and when the Ring-OSC clock is selected and supplied to the CPU, the
operation of 16-bit timer/event counter 00 is not guaranteed, either, because the Ring-OSC
clock is supplied as the sampling clock to eliminate noise.
using the valid edge of TI000 and the capture trigger.
immediately detected after the rising edge or both the rising and falling edges are set as the
valid edge(s) of the TI000 pin or TI010 pin to enable the operation of 16-bit timer counter 00
(TM00). Care is therefore required when pulling up the TI000 or TI010 pin. However, when re-
enabling operation after the operation has been stopped once, the rising edge is not
detected.
when used as TO00, it cannot be used as the TI010 valid edge.
: X1 input clock oscillation frequency
PRM011
ES111
ES111
ES011
7
0
0
1
1
0
0
1
1
0
0
1
1
After reset: 00H
Figure 6-13. Format of Prescaler Mode Register 01 (PRM01)
CHAPTER 6 16-BIT TIMER/EVENT COUNTERS 00 AND 01
PRM010
ES110
ES010
ES110
6
0
1
0
1
0
1
0
1
0
1
0
1
R/W
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
Falling edge
Rising edge
Setting prohibited
Both falling and rising edges
f
f
f
TI001 valid edge
X
X
X
/2
/2
(10 MHz)
ES011
4
6
(625 kHz)
(156.25 kHz)
User’s Manual U16228EJ2V0UD
5
ES010
Note
4
X
= 10 MHz.
TI011 valid edge selection
TI001 valid edge selection
Count clock selection
3
0
2
0
X
).
PRM011
1
PRM010
0

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