pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 19

• Manufacturer Part Number: pc87317vul
• Description: Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
• Manufacturer: National Semiconductor Corporation

DRQ3-0
DSKCHG
DSR2,1
DSTRB
DTR2,1
ERR
GPIO17-15
GPIO14
GPIO13,12
GPIO11
GPIO10
GPIO27,26
GPIO25
GPIO24
GPIO23,22
GPIO21
GPIO20
Signal/Pin
Name
55-52
99
143, 133
119
144, 134
116
156-154
153
152,151
150
149
76,75,
74 or 107,
73 or 80,
160-159,
158 or 77
157.
Number
Pin
Parallel Port
Parallel Port
Purpose
Purpose
ISA-Bus
Module
UART1,
UART1,
General
General
UART2
UART2
FDC
Group 18
Group 13
Group 17
Group 10
Group 25
Group 10
Group 24
Group 10
Group 10
Group 25
Group 10
Group 10
Group 10
Group 10
Group #
Signal/Pin Connection and Description
Group 1
Group 1
Group 3
I/O and
Output
Output
Output
Input
Input
Input
I/O
I/O
DMA Request 0, 1, 2 and 3 – These active high output signals inform
the DMA controller that a data transfer is needed. These DMA signals
can be mapped to the following logical devices: Floppy Disk Controller
(FDC), UART1, UART2 or parallel port.
Disk Change – This input signal indicates whether or not the drive
door has been opened. The state of this pin is available from the
Digital Input Register (DIR). This pin can also be configured as the
RGATE data separator diagnostic input signal via the MODE
command. See the MODE command in Section 5.7.7.
Data Set Ready – When low, this signal indicates that the data
transfer device, e.g., modem, is ready to establish a communications
link.
DSR2 is multiplexed with GPIO32.
Data Strobe – This signal is used in EPP mode as a data strobe. It
is active low.
DSTRB is multiplexed with AFD. See TABLE 6-12 for more
information.
Data Terminal Ready – When low, this output signal indicates to the
modem or other data transfer device that the UART1 or UART2 is
ready to establish a communications link.
A Master Reset (MR) deactivates this signal high, and loopback
operation holds this signal inactive.
DTR2 is multiplexed with CFG1 and BOUT2.
DTR1 is multiplexed with BADDR0 and BOUT1.
Error – This input signal is set active low by the printer when it has
detected an error. This pin is internally connected to a weak pull-up.
General Purpose I/O Signals 17-10 – General purpose I/O signals of
I/O Port 1.
GPIO17 is multiplexed with WDO.
GPIO16 is multiplexed with PME1.
GPIO15 is multiplexed with PME2.
General Purpose I/O Signals 27-20 – General purpose I/O port 2
signals.
GPIO27-26 are multiplexed with XD5-4, respectively.
GPIO25 is multiplexed with XD3 on pin 74 and with P16 on pin107.
GPIO24 is multiplexed with XD2 on pin 73 and with IRRX1 on pin 80.
GPIO23 is multiplexed with RING.
GPIO22 is multiplexed with POR.
GPIO21 is multiplexed on pin 158 with IRSL2, IRSL0 and ID2 and on pin
77 with IRSL2, SELCS and XD6. See Bits 4,3 - GPIO21, IRSL2/ID2 or
IRSL0 Pin Select in Section 2.4.4.
GPIO20 is multiplexed with IRSL1 and ID1.
19
Function
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