pc87317vul National Semiconductor Corporation, pc87317vul Datasheet - Page 62

• Manufacturer Part Number: pc87317vul
• Description: Pc87317vul/pc97317vul Superi/o Plug And Play Compatible With Acpi Compliant Controller/extender
• Manufacturer: National Semiconductor Corporation

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No Power
This state exists when no external or battery power is con-
nected to the device. This condition will not occur once a
backup battery has been connected, except in the case of a
malfunction. The APC undergoes initialization only when
leaving this state.
Power On
This is the normal state when the PC is active. This state
may be initiated by various events in addition to the normal
physical switching on of the system. In this state, the PC
power supply is powered by external AC power and produc-
es V
device are powered by V
logical device, which is powered by V
Power Off (Suspended)
This is the normal state when the PC has been switched off
and is not required to be active, but is still connected to a
live external AC input power source. This state may be ini-
tiated directly or by software, and causes the PC system to
be powered down. The RTC logical device remains active,
powered by V
Power Failure
This state occurs when the external power source to the PC
stops supplying power, due to disconnection or power fail-
ure on the external AC input power source. The RTC con-
tinues to maintain timekeeping and RAM data under battery
power (V
RTC. In this case, the oscillator stops functioning if the sys-
tem goes to battery power, and timekeeping data becomes
invalid.
4.3.2
In the Power On state, the PC host is powered by the pow-
er-supply voltage V
the Power Off state if the conditions for this state occur (See
Section 4.4.3 on page 67), or the Power Failure state if ex-
ternal power is removed.
In the Power Off state, the PC hosts does not receive power
from the system power supply, except for RTC and APC
which receive V
state if the conditions for this state occur (see Section 4.4.3
on page 67), or the Power Failure state if external power is
removed.
V
+
+
DD
DD
and V
System Power Switching Logic
BAT
TABLE 4-6. System Power States
), unless the oscillator stop bit was set in the
V
CCH
CCH
CCH
+
CCH.
.
. The PC system and the PC87317VUL
DD
Real-Time Clock (RTC) and Advanced Power Control (APC) (Logical Device 2)
The system may enter the Power On
. From this state the system enters
DD
+ or -
+ or -
+ or -
V
, with the exception of the RTC
BAT
+
CCH.
Power Failure
Power State
Illegal State
No Power
Power Off
Power On
62
Knowing the system’s state is important for the correct de-
tection of the Switch Events. The PC87317 distinguishes
between Power On and Power Off as follows:
V
sibility of the APC entering the Power Failure state and
switching to battery power.
If V
timekeeping functions and the APC all stop functioning.
If no external or battery-backup power is available, the sys-
tem enters a No Power state. Upon leaving this state, the
system is initialized.
4.4 APC DETAILED DESCRIPTION
4.4.1
The APC checks when activation or deactivation conditions
are met, and drives the ONCTL signal accordingly. This sig-
nal activates the system power supply. ONCTL is physically
generated as the output of the ONCTL set-reset flip-flop.
The state of the ONCTL flip-flop depends on the following:
The Preceding State of the ONCTL Signal
A power failure may occur when the system is active or in-
active. The ONCTL flip-flop maintains the state of the
ONCTL signal at the time of the power failure. When power
is restored, the ONCTL signal returns the system to a state
determined by the saved status of ONCTL and the saved
value of the MOAP bit if this option is selected via APCR6
bits 6 and 7.
The MOAP Bit
The Mask ONCTL Activation in Power Failure (MOAP) bit
(bit 4 of APCR1) is controlled by software. It makes it possi-
ble to choose the desired system response upon return
from a power failure and decide whether the system re-
mains inactive until it is manually switched on, or resumes
the state that prevailed at the time of the power failure, in-
cluding enabling of “wake-up” events, as described in the
next section.
Logical Conditions that Define the Status of the ONCTL
Flip-Flop
The logical conditions described here set or reset the
ONCTL flip-flop. They reflect the events described in Sec-
tion 4.4.3 on page 67.
Conditions that put the ONCTL flip-flop in a 0 state (active
ONCTL signal):
DD
V
V
BAT
Presence of activation conditions
The status of the Mask ONCTL Activation (MOAP) bit
and APCR6 bits 6 and 7
Power source condition
The preceding state of ONCTL
Switch On event occurred.
RTC Alarm Status bit (bit 2 of PM1_STS_HIGH) and
RTC Alarm Enable bit (bit 2 of PM1_EN_HIGH)are set
Match Enable bit is 1 (APCR2 bit 0) and there is a
match between the real-time clock and the time spec-
ified in the pre-determined date and time registers.
must be at least V
DD
CCH
falls below 2V with V
exists implies power On
The ONCTL Flip-Flop and Signal
exists and V
DD
BAT
does not implies Power Off.
+500 mvolt, to prevent the pos-
CCH
absent, the oscillator, the