xq2vp40 Xilinx Corp., xq2vp40 Datasheet - Page 92

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xq2vp40

Manufacturer Part Number
xq2vp40
Description
Qpro Virtex-ii Pro 1.5v Platform Fpgas Complete Data Sheet
Manufacturer
Xilinx Corp.
Datasheet

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BREFCLK Pin Definitions
These dedicated clocks use the same clock inputs for all packages
Table 5: BREFCLK Pin Definitions
For detailed information about using BREFCLK/BREFCLK2, including routing considerations and pin numbers for all
package types, refer to Chapter 2, "Digital Design Considerations," in the RocketIO Transceiver User Guide.
DS136-4 (v2.0) December 20, 2007
Preliminary Product Specification
Top
R
BREFCLK2
BREFCLK
N
N
P
P
GCLK4S
GCLK5P
GCLK2S
GCLK3P
www.xilinx.com
Bottom
(Table
5):
BREFCLK2
BREFCLK
P
N
P
N
Pinout Information
Module 4 of 4
GCLK6P
GCLK7S
GCLK0P
GCLK1S
4

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